검색결과 : 4건
| No. | Article |
|---|---|
| 1 |
Systematic analysis of oxide trap distribution of 4H-SiC DMOSFETs using TSCIS and its correlation with BTI and SILC behavior Baek S, Lee J, Park I, Baek RH, Lee JS Solid-State Electronics, 140, 18, 2018 |
| 2 |
High-performance logic transistor DC benchmarking toward 7 nm technology-node between III-V and Si tri-gate n-MOSFETs using virtual-source injection velocity model Baek RH, Kim JS, Kim DK, Kim T, Kim DH Solid-State Electronics, 116, 100, 2016 |
| 3 |
Investigation of process-induced performance variability and optimization of the 10 nm technology node Si bulk FinFETs Baek RH, Kang CY, Sohn CW, Kim DM, Kirsch P Solid-State Electronics, 96, 27, 2014 |
| 4 |
Electrical characteristics of 20-nm junctionless Si nanowire transistors Park CH, Ko MD, Kim KH, Baek RH, Sohn CW, Baek CK, Park S, Deen MJ, Jeong YH, Lee JS Solid-State Electronics, 73, 7, 2012 |