검색결과 : 2건
No. | Article |
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1 |
Silicon tunnel FET with average subthreshold slope of 55 mV/dec at low drain currents Narimani K, Glass S, Bernardy P, von den Driesch N, Zhao QT, Mantl S Solid-State Electronics, 143, 62, 2018 |
2 |
Low temperature RPCVD epitaxial growth of Si1-xGex using Si2H6 and Ge2H6 Wirths S, Buca D, Tiedemann AT, Bernardy P, Hollander B, Stoica T, Mussler G, Breuer U, Mantl S Solid-State Electronics, 83, 2, 2013 |