검색결과 : 2건
| No. | Article |
|---|---|
| 1 |
Folded fully depleted FET using Silicon-On-Nothing technology as a highly W-scaled planar solution Bidal G, Loubet N, Fenouillet-Beranger C, Denorme S, Perreau P, Fleury D, Clement L, Laviron C, Leverd F, Gouraud P, Barnola S, Beneyton R, Torres A, Duluard C, Chapon JD, Orlando B, Salvetat T, Grosjean M, Deloffre E, Pantel R, Dutartre D, Monfray S, Ghibaudo G, Boeuf F, Skotnicki T Solid-State Electronics, 53(7), 735, 2009 |
| 2 |
65 nm LP/GP mix low cost platform for multi-media wireless and consumer applications Tavel B, Duriez B, Gwoziecki R, Basso MT, Julien C, Ortolland C, Laplanche Y, Fox R, Sabouret E, Detcheverry C, Boeuf F, Morin P, Barge D, Bidaud M, Bienacel J, Garnier P, Cooper K, Chapon JD, Trouiller Y, Belledent J, Broekaart M, Gouraud P, Denais M, Huard V, Rochereau K, Difrenza R, Planes N, Marin M, Boret S, Gloria D, Vanbergue S, Abramowitz P, Vishnubhotla L, Reber D, Stolk P, Woo M, Arnaud F Solid-State Electronics, 50(4), 573, 2006 |