검색결과 : 2건
| No. | Article |
|---|---|
| 1 |
Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure Cheng CH, Chou KI, Zheng ZW, Hsu HH Current Applied Physics, 14(1), 139, 2014 |
| 2 |
Achieving low sub-0.6-nm EOT in gate-first n-MOSFET with TiLaO/CeO2 gate stack Cheng CH, Chou KI, Chin A Solid-State Electronics, 82, 111, 2013 |