검색결과 : 1건
| No. | Article |
|---|---|
| 1 |
Analysis and modeling of wafer-level process variability in 28 nm FD-SOI using split C-V measurements Pradeep K, Poiroux T, Scheer P, Juge A, Gouget G, Ghibaudo G Solid-State Electronics, 145, 19, 2018 |
| No. | Article |
|---|---|
| 1 |
Analysis and modeling of wafer-level process variability in 28 nm FD-SOI using split C-V measurements Pradeep K, Poiroux T, Scheer P, Juge A, Gouget G, Ghibaudo G Solid-State Electronics, 145, 19, 2018 |