검색결과 : 6건
| No. | Article |
|---|---|
| 1 |
Charge-based compact analytical model for triple-gate junctionless nanowire transistors Avila-Herrera F, Paz BC, Cerdeira A, Estrada M, Pavanello MA Solid-State Electronics, 122, 23, 2016 |
| 2 |
Effect of high-k and vacuum dielectrics as gate stack on a junctionless cylindrical surrounding gate (JL-CSG) MOSFET Sharma A, Jain A, Pratap Y, Gupta RS Solid-State Electronics, 123, 26, 2016 |
| 3 |
Behavior of subthreshold conduction in junctionless transistors Park SJ, Jeon DY, Montes L, Mouis M, Barraud S, Kim GT, Ghibaudo G Solid-State Electronics, 124, 58, 2016 |
| 4 |
Compact model for short-channel symmetric double-gate junctionless transistors Avila-Herrera F, Cerdeira A, Paz BC, Estrada M, Iniguez B, Pavanello MA Solid-State Electronics, 111, 196, 2015 |
| 5 |
Compact core model for Symmetric Double-Gate Junctionless Transistors Cerdeira A, Avila F, Iniguez B, de Souza M, Pavanello MA, Estrada M Solid-State Electronics, 94, 91, 2014 |
| 6 |
Charge-based continuous model for long-channel Symmetric Double-Gate Junctionless Transistors Cerdeira A, Estrada M, Iniguez B, Trevisoli RD, Doria RT, de Souza M, Pavanello MA Solid-State Electronics, 85, 59, 2013 |