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| No. | Article |
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| 1 |
Design of SOI FinFET on 32 nm technology node for low standby power (LSTP) operation considering gate-induced drain leakage (GIDL) Cho S, Lee JH, O'uchi S, Endo K, Masahara M, Park BG Solid-State Electronics, 54(10), 1060, 2010 |