검색결과 : 25건
| No. | Article |
|---|---|
| 1 |
DC and low frequency noise performances of SOI p-FinFETs at very low temperature Achour H, Talmat R, Cretu B, Routoure JM, Benfdila A, Carin R, Collaert N, Simoen E, Mercha A, Claey C Solid-State Electronics, 90, 160, 2013 |
| 2 |
Low frequency noise characterization in n-channel FinFETs Talmat R, Achour H, Cretu B, Routoure JM, Benfdila A, Carin R, Collaert N, Mercha A, Simoen E, Claeys C Solid-State Electronics, 70, 20, 2012 |
| 3 |
Microwave noise modeling of FinFETs Crupi G, Caddemi A, Schreurs DMMP, Wiatr W, Mercha A Solid-State Electronics, 56(1), 18, 2011 |
| 4 |
Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession Chiarella T, Witters L, Mercha A, Kerner C, Rakowski M, Ortolland C, Ragnarsson LA, Parvais B, De Keersgieter A, Kubicek S, Redolfi A, Vrancken C, Brus S, Lauwers A, Absil P, Biesemans S, Hoffmann T Solid-State Electronics, 54(9), 855, 2010 |
| 5 |
Low-frequency noise and static analysis of the impact of the TiN metal gate thicknesses on n- and p-channel MuGFETs Rodrigues M, Martino JA, Mercha A, Collaert N, Simoen E, Claeys C Solid-State Electronics, 54(12), 1592, 2010 |
| 6 |
Progressive degradation of TiN/SiON and TiN/HfO2 gate stack triple gate SOI nFinFETs subjected to electrical stress Rafi JM, Simoen E, Mercha A, Collaert N, Campabadal F, Claeys C Journal of Vacuum Science & Technology B, 27(1), 453, 2009 |
| 7 |
Analytical extraction of small and large signal models for FinFET varactors Crupi G, Schreurs DMMP, Dehan M, Xiao D, Caddemi A, Mercha A, Decoutere S Solid-State Electronics, 52(5), 704, 2008 |
| 8 |
Multi-gate devices for the 32 nm technology node and beyond Collaert N, De Keersgieter A, Dixit A, Ferain I, Lai LS, Lenoble D, Mercha A, Nackaerts A, Pawlak BJ, Rooyackers R, Schulz T, San KT, Son NJ, Van Dal MJH, Verheyen P, von Arnim K, Witters L, Meyer KD, Biesemans S, Jurczak M Solid-State Electronics, 52(9), 1291, 2008 |
| 9 |
Impact of strain and source/drain engineering on the low frequency noise behaviour in n-channel tri-gate FinFETs Guo W, Cretu B, Routoure JM, Carin R, Simoen E, Mercha A, Collaert N, Put S, Claeys C Solid-State Electronics, 52(12), 1889, 2008 |
| 10 |
Impact of line width roughness on the matching performances of next-generation devices Gustin C, Leunissen LHA, Mercha A, Decoutere S, Lorusso G Thin Solid Films, 516(11), 3690, 2008 |