1 |
X-band T/R switch with body-floating multi-gate PDSOI NMOS transistors Park M, Min BW Solid-State Electronics, 141, 69, 2018 |
2 |
Study of drain-extended NMOS under electrostatic discharge stress in 28 nm and 40 nm CMOS process Wang WH, Jin H, Dong SR, Zhong L, Han Y Solid-State Electronics, 116, 80, 2016 |
3 |
Layout optimization of GGISCR structure for on-chip system level ESD protection applications Zeng J, Dong SR, Wong H, Hu T, Li X Solid-State Electronics, 126, 152, 2016 |
4 |
InGaAs inversion layers band structure, electrostatics, and mobility modeling based on 8 band (k)over-right-arrow . (p)over-right-arrowtheory Pham AT, Jin S, Choi W, Lee MJ, Cho SH, Kim YT, Lee KH, Park Y Solid-State Electronics, 113, 79, 2015 |
5 |
Tunable Electronic Transport Properties of Metal-Cluster-Decorated III-V Nanowire Transistors Han N, Wang FY, Hou JJ, Yip SP, Lin H, Xiu F, Fang M, Yang ZX, Shi XL, Dong GF, Hung TF, Ho JC Advanced Materials, 25(32), 4445, 2013 |
6 |
Low temperature catalyst enhanced etch process with high etch rate selectivity for amorphous silicon based alloys over single-crystalline silicon based alloys Bauer M, Thomas SG Thin Solid Films, 520(8), 3139, 2012 |
7 |
Characterization and analysis of epitaxial silicon phosphorus alloys for use in n-channel transistors Weeks KD, Thomas SG, Dholabhai P, Adams J Thin Solid Films, 520(8), 3158, 2012 |
8 |
The direct evidence of substrate potential propagation in a gate-grounded NMOS Yang DH, Chen JF, Wu KM, Shih JR, Lee JH Solid-State Electronics, 54(7), 728, 2010 |
9 |
Novel chemical precursors and novel CVD strategies enabling low temperature epitaxy of Si and Si:C alloys Bauer M, Thomas SG Thin Solid Films, 518, S200, 2010 |
10 |
Selective epitaxial deposition of strained silicon: a simple and effective method for fabricating high performance MOSFET devices Delhougne R, Eneman G, Caymax M, Loo R, Meunier-Beillard P, Verheyen P, Vandervorst W, De Meyer K, Heyns M Solid-State Electronics, 48(8), 1307, 2004 |