검색결과 : 5건
No. | Article |
---|---|
1 |
A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) UTB SOI MOSFETs including substrate induced surface potential effectsd Kumar A, Tiwari PK Solid-State Electronics, 95, 52, 2014 |
2 |
Low temperature selective epitaxial growth of SiCP on Si(110) oriented surfaces Bauer M, Thomas SG Thin Solid Films, 520(8), 3144, 2012 |
3 |
Analysis of subthreshold conduction in short-channel recessed source/drain UTB SOI MOSFETs Svilicic B, Jovanovic V, Suligoj T Solid-State Electronics, 54(5), 545, 2010 |
4 |
Analytical models of front- and back-gate potential distribution and threshold voltage for recessed source/drain UTB SOI MOSFETs Svilicic B, Jovanovic V, Suligoj T Solid-State Electronics, 53(5), 540, 2009 |
5 |
Vertical silicon-on-nothing FET: Threshold voltage calculation using compact capacitance model Svilicic B, Jovanovic V, Suligoj T Solid-State Electronics, 52(10), 1505, 2008 |