검색결과 : 9건
| No. | Article |
|---|---|
| 1 |
RF SOI CMOS technology on 1st and 2nd generation trap-rich high resistivity SOI wafers Esfeh BK, Makovejev S, Basso D, Desbonnets E, Kilchytska V, Flandre D, Raskin JP Solid-State Electronics, 128, 121, 2017 |
| 2 |
FinFET and UTBB for RF SOI communication systems Raskin JP Solid-State Electronics, 125, 73, 2016 |
| 3 |
LSMO thin films with high metal-insulator transition temperature on buffered SOI substrates for uncooled microbolometers Chromik S, Strbik V, Dobrocka E, Roch T, Rosova A, Spankova M, Lalinsky T, Vanko G, Lobotka P, Ralbovsky M, Choleva P Applied Surface Science, 312, 30, 2014 |
| 4 |
Reliability concern and design for the lateral insulator gate bipolar transistor based on SOI substrate Liu SY, Huang TT, Sun WF, Zhang CW Solid-State Electronics, 85, 28, 2013 |
| 5 |
Epitaxial growth of fully relaxed Si0.75Ge0.25 on SOI substrate Xue ZY, Wei X, Zhang B, Wu AM, Zhang MA, Wang X Applied Surface Science, 257(11), 5021, 2011 |
| 6 |
Design and optimization of high voltage LDMOS transistors on 0.18 mu m SOI CMOS technology Toulon G, Cortes I, Morancho F, Hugonnard-Bruyere E, Villard B, Toren WJ Solid-State Electronics, 61(1), 111, 2011 |
| 7 |
Comparisons of hot-carrier degradation behavior in SOI-LIGBT and SOI-LDMOS with different stress conditions Liu SY, Sun WF, Qian QS, Zhu J Solid-State Electronics, 54(12), 1598, 2010 |
| 8 |
Spectral responsivity of fast Ge photodetectors on SOI Kaschel M, Oehme M, Kirfel O, Kasper E Solid-State Electronics, 53(8), 909, 2009 |
| 9 |
Impact of strain and source/drain engineering on the low frequency noise behaviour in n-channel tri-gate FinFETs Guo W, Cretu B, Routoure JM, Carin R, Simoen E, Mercha A, Collaert N, Put S, Claeys C Solid-State Electronics, 52(12), 1889, 2008 |