| 1 |
Effect of high-k and vacuum dielectrics as gate stack on a junctionless cylindrical surrounding gate (JL-CSG) MOSFET
Sharma A, Jain A, Pratap Y, Gupta RS
Solid-State Electronics, 123, 26, 2016 |
| 2 |
Analytical model of drain current of cylindrical surrounding gate p-n-i-n TFET
Xu WJ, Wong H, Iwai H
Solid-State Electronics, 111, 171, 2015 |
| 3 |
Compact model for long-channel cylindrical surrounding-gate MOSFETs valid from low to high doping concentrations
Cheralathan M, Cerdeira A, Iniguez B
Solid-State Electronics, 55(1), 13, 2011 |
| 4 |
A charge-based compact model for predicting the current-voltage and capacitance-voltage characteristics of heavily doped cylindrical surrounding-gate MOSFETs
Liu FL, Zhang J, He F, Liu F, Zhang LN, Chan MS
Solid-State Electronics, 53(1), 49, 2009 |
| 5 |
An analytic model for threshold voltage shift due to quantum confinement in surrounding gate MOSFETs with anisotropic effective mass
Yuan Y, Yu B, Song J, Taur Y
Solid-State Electronics, 53(2), 140, 2009 |
| 6 |
A new compact subthreshold behavior model for dual-material surrounding gate (DMSG) MOSFETs
Chiang TK
Solid-State Electronics, 53(5), 490, 2009 |
| 7 |
Symmetric linearization method for double-gate and surrounding-gate MOSFET models
Dessai G, Dey A, Gildenblat G, Smit GDJ
Solid-State Electronics, 53(5), 548, 2009 |
| 8 |
A unified charge model for symmetric double-gate and surrounding-gate MOSFETs
Lu HX, Yu B, Taur Y
Solid-State Electronics, 52(1), 67, 2008 |
| 9 |
An analytical threshold voltage model for graded channel asymmetric gate stack (GCASYMGAS) surrounding gate MOSFET
Kaur H, Kabra S, Haldar S, Gupta RS
Solid-State Electronics, 52(2), 305, 2008 |
| 10 |
Impact of graded channel (GC) design in fully depleted cylindrical/surrounding gate MOSFET (FD CGT/SGT) for improved short channel immunity and hot carrier reliability
Kaur H, Kabra S, Bindra S, Haldar S, Gupta RS
Solid-State Electronics, 51(3), 398, 2007 |
