검색결과 : 11건
| No. | Article |
|---|---|
| 1 |
Planar Fully-Depleted-Silicon-On-Insulator technologies: Toward the 28 nm node and beyond Doris B, DeSalvo B, Cheng K, Morin P, Vinet M Solid-State Electronics, 117, 37, 2016 |
| 2 |
UTBB FDSOI: Evolution and opportunities Monfray S, Skotnicki T Solid-State Electronics, 125, 63, 2016 |
| 3 |
Impact of processing and back-gate biasing conditions on the low-frequency noise of ultra-thin buried oxide silicon-on-insulator nMOSFETs Kudina V, Garbar N, Simoen E, Claeys C Solid-State Electronics, 105, 37, 2015 |
| 4 |
Fabrication of bonded GeOI substrates with thin Al2O3/SiO2 buried oxide layers Moriyama Y, Ikeda K, Kamimuta Y, Oda M, Irisawa T, Nakamura Y, Sakai A, Tezuka T Solid-State Electronics, 83, 42, 2013 |
| 5 |
Quasi-double gate regime to boost UTBB SO MOSFET performance in analog and sleep transistor applications Kilchytska V, Bol D, De Vos J, Andrieu F, Flandre D Solid-State Electronics, 84, 28, 2013 |
| 6 |
On the extension of ET-FDSOI roadmap for 22 nm node and beyond Sampedro C, Gamiz F, Godoy A Solid-State Electronics, 90, 23, 2013 |
| 7 |
Ultra-thin body and thin-BOX SOI CMOS technology analog figures of merit Kilchytska V, Arshad MKM, Makovejev S, Olsen S, Andrieu F, Poiroux T, Faynot O, Raskin JP, Flandre D Solid-State Electronics, 70, 50, 2012 |
| 8 |
Impact of self-heating and substrate effects on small-signal output conductance in UTBB SOI MOSFETs Makovejev S, Raskin JP, Arshad MKM, Flandre D, Olsen S, Andrieu F, Kilchytska V Solid-State Electronics, 71, 93, 2012 |
| 9 |
Substrate impact on threshold voltage and subthreshold slope of sub-32 nm ultra thin SOI MOSFETs with thin buried oxide and undoped channel Burignat S, Flandre D, Arshad MKM, Kilchytska V, Andrieu F, Faynot O, Raskin JP Solid-State Electronics, 54(2), 213, 2010 |
| 10 |
Folded fully depleted FET using Silicon-On-Nothing technology as a highly W-scaled planar solution Bidal G, Loubet N, Fenouillet-Beranger C, Denorme S, Perreau P, Fleury D, Clement L, Laviron C, Leverd F, Gouraud P, Barnola S, Beneyton R, Torres A, Duluard C, Chapon JD, Orlando B, Salvetat T, Grosjean M, Deloffre E, Pantel R, Dutartre D, Monfray S, Ghibaudo G, Boeuf F, Skotnicki T Solid-State Electronics, 53(7), 735, 2009 |