검색결과 : 2건
No. | Article |
---|---|
1 |
Cu bump interconnections in 20 mu m-pitch at low temperature utilizing electroless tin-plating on 3D stacked LSI Tomita Y, Morifuji T, Tomisaka M, Sunohara M, Nemoto Y, Sato T, Takahashi K, Bonkohara M Journal of Chemical Engineering of Japan, 36(2), 119, 2003 |
2 |
High-aspect-ratio copper via filling used for three-dimensional chip stacking Sun JJ, Kondo K, Okamura T, Oh SJ, Tomisaka M, Yonemura H, Hoshino M, Takahashi K Journal of the Electrochemical Society, 150(6), G355, 2003 |