검색결과 : 8건
No. | Article |
---|---|
1 |
Low-frequency noise measurements at liquid helium temperature operation in ultra-thin buried oxide transistors - Physical interpretation of transport phenomena Nafaa B, Cretu B, Ismail N, Touayar O, Carin R, Simoen E, Veloso A Solid-State Electronics, 150, 1, 2018 |
2 |
Understanding and optimizing the floating body retention in FDSOI UTBOX Aoulaiche M, Simoen E, Caillat C, Witters L, Bourdelle KK, Nguyen BY, Martino J, Claeys C, Fazan P, Jurczak M Solid-State Electronics, 117, 123, 2016 |
3 |
Advantages of different source/drain engineering on scaled UTBOX FDSOI nMOSFETs at high temperature operation Nicoletti T, dos Santos SD, Martino JA, Aoulaiche M, Veloso A, Jurczak M, Simoen E, Claeys C Solid-State Electronics, 91, 53, 2014 |
4 |
Low-frequency noise assessment in advanced UTBOX SOI nMOSFETs with different gate dielectrics dos Santos SD, Cretu B, Strobel V, Routoure JM, Carin R, Martino JA, Aoulaiche M, Jurczak M, Simoen E, Claeys C Solid-State Electronics, 97, 14, 2014 |
5 |
Improved retention times in UTBOX nMOSFETs for 1T-DRAM applications Sasaki KRA, Nicoletti T, Almeida LM, dos Santos SD, Nissimoff A, Aoulaiche M, Simoen E, Claeys C, Martino JA Solid-State Electronics, 97, 30, 2014 |
6 |
Impact of local back biasing on performance in hybrid FDSOI/bulk high-k/metal gate low power (LP) technology Fenouillet-Beranger C, Perreau P, Benoist T, Richier C, Haendler S, Pradelle J, Bustos J, Brun P, Tosti L, Weber O, Andrieu F, Orlando B, Pellissier-Tanon D, Abbate F, Richard C, Beneyton R, Gregoire M, Ducote J, Gouraud P, Margain A, Borowiak C, Bianchini R, Planes N, Gourvest E, Bourdelle KK, Nguyen BY, Poiroux T, Skotnicki T, Faynot O, Boeuf F Solid-State Electronics, 88, 15, 2013 |
7 |
Optimizing the front and back biases for the best sense margin and retention time in UTBOX FBRAM Almeida LM, Sasaki KRA, Caillat C, Aoulaiche M, Collaert N, Jurczak M, Simoen E, Claeys C, Martino JA Solid-State Electronics, 90, 149, 2013 |
8 |
Parasitic bipolar impact in 32 nm undoped channel Ultra-Thin BOX (UTBOX) and biased Ground Plane FDSOI high-k/metal gate technology Fenouillet-Beranger C, Perreau P, Boulenc P, Tosti L, Barnola S, Andrieu F, Weber O, Beneyton R, Perrot C, de Buttet C, Abbate F, Campidelli Y, Pinzelli L, Gouraud P, Margain A, Peru S, Bourdelle KK, Nguyen BY, Boedt F, Poiroux T, Faynot O, Skotnicki T, Boeuf F Solid-State Electronics, 74, 32, 2012 |