검색결과 : 5건
| No. | Article |
|---|---|
| 1 |
Analysis of USJ formation with combined RTA/laser annealing conditions for 28 nm high-k/metal gate CMOS technology using advanced TCAD for process and device simulation Bazizi EM, Zaka A, Benistant F Solid-State Electronics, 83, 61, 2013 |
| 2 |
Analysis of defect capture cross sections using non-radiative multiphonon-assisted trapping model Garetto D, Randriamihaja YM, Zaka A, Rideau D, Schmid A, Jaouen H, Leblebici Y Solid-State Electronics, 71, 74, 2012 |
| 3 |
Characterization and 3D TCAD simulation of NOR-type flash non-volatile memories with emphasis on corner effects Zaka A, Singer J, Dornel E, Garetto D, Rideau D, Rafhay Q, Clerc R, Manceau JP, Degors N, Boccaccio C, Tavernier C, Jaouen H Solid-State Electronics, 63(1), 158, 2011 |
| 4 |
Effects of He Plasma Pretreatment on Low-k Damage during Cu Surface Cleaning with NH3 Plasma Urbanowicz AM, Shamiryan D, Zaka A, Verdonck P, De Gendt S, Baklanov MR Journal of the Electrochemical Society, 157(5), H565, 2010 |
| 5 |
On the accuracy of current TCAD hot carrier injection models in nanoscale devices Zaka A, Rafhay Q, Iellina M, Palestri P, Clerc R, Rideau D, Garetto D, Dornel E, Singer J, Pananakakis G, Tavernier C, Jaouen H Solid-State Electronics, 54(12), 1669, 2010 |