검색결과 : 17건
| No. | Article |
|---|---|
| 1 |
On the accuracy of current TCAD hot carrier injection models in nanoscale devices Zaka A, Rafhay Q, Iellina M, Palestri P, Clerc R, Rideau D, Garetto D, Dornel E, Singer J, Pananakakis G, Tavernier C, Jaouen H Solid-State Electronics, 54(12), 1669, 2010 |
| 2 |
Compact model for short channel symmetric doped double-gate MOSFETs Cerdeira A, Iniguez B, Estrada M Solid-State Electronics, 52(7), 1064, 2008 |
| 3 |
Quantum mechanical modeling of MOSFET gate leakage for high-k gate dielectrics Wu HX, Zhao Y, White MH Solid-State Electronics, 50(6), 1164, 2006 |
| 4 |
On gate leakage current partition for MOSFET compact model Hu J, Xi XM, Niknejad A, Hu CM Solid-State Electronics, 50(11-12), 1740, 2006 |
| 5 |
Substrate current, gate current and lifetime prediction of deep-submicron nMOS devices Cui Z, Liou JJ, Yue Y, Wong H Solid-State Electronics, 49(3), 505, 2005 |
| 6 |
A physical model for gate-to-body tunneling current and its effects on floating-body PD/SOI CMOS devices and circuits Yang JW, Fossum JG, Workman GO, Huang CL Solid-State Electronics, 48(2), 259, 2004 |
| 7 |
Performance evaluation of ultra-thin gate-oxide CMOS circuits Marras A, De Munari I, Vescovi D, Ciampolini P Solid-State Electronics, 48(4), 551, 2004 |
| 8 |
DC and AC MOS transistor modelling in presence of high gate leakage and experimental validation Gilibert F, Rideau D, Bernardini S, Scheer P, Minondo M, Roy D, Gouget G, Juge A Solid-State Electronics, 48(4), 597, 2004 |
| 9 |
Modeling of direct tunneling current through interfacial oxide and high-K gate stacks Zhao YJ, White MH Solid-State Electronics, 48(10-11), 1801, 2004 |
| 10 |
Analytical model for the programming of source side injection SST superflash split-gate cell using two-dimensional analysis Guan HN, Lee D, Li GP Solid-State Electronics, 48(12), 2199, 2004 |