검색결과 : 12건
| No. | Article |
|---|---|
| 1 |
RF SOI CMOS technology on 1st and 2nd generation trap-rich high resistivity SOI wafers Esfeh BK, Makovejev S, Basso D, Desbonnets E, Kilchytska V, Flandre D, Raskin JP Solid-State Electronics, 128, 121, 2017 |
| 2 |
FinFET and UTBB for RF SOI communication systems Raskin JP Solid-State Electronics, 125, 73, 2016 |
| 3 |
Advanced Si-based substrates for RF passive integration: Comparison between local porous Si layer technology and trap-rich high resistivity Si Sarafis P, Hourdakis E, Nassiopoulou AG, Neve CR, Ben Ali K, Raskin JP Solid-State Electronics, 87, 27, 2013 |
| 4 |
Temperature behavior of spiral inductors on high resistivity substrate in SOI CMOS technology El Kaamouchi M, Delatte P, Moussa MS, Raskin JP, Vanhoenacker-Janvier D Solid-State Electronics, 52(12), 1915, 2008 |
| 5 |
Carrier transport properties in high resistivity polycrystalline CdZnTe material Kim KH, Ahn SY, An SY, Hong JK, Yi Y, Kim SU Current Applied Physics, 7(3), 296, 2007 |
| 6 |
Experimental study of the formation of high-resistivity zones at the gel/buffer interface in CE Khozikov V, Kosobokova O, Citver G, Tyshko G, Gavrilov DN, Gudkov G, Gorfinkel V Electrophoresis, 28(3), 317, 2007 |
| 7 |
Behaviour of TFMS and CPW line on SOI substrate versus high temperature for RF applications Moussa MS, Pavageau C, Lederer D, Picheta L, Danneville F, Fel N, Russat J, Raskin JP, Vanhoenacker-Janvier D Solid-State Electronics, 50(11-12), 1822, 2006 |
| 8 |
Effective resistivity of fully-processed SOI substrates Lederer D, Raskin JP Solid-State Electronics, 49(3), 491, 2005 |
| 9 |
Schottky diode back contacts for high frequency capacitance studies on semiconductors Mallik K, Falster RJ, Wilshaw PR Solid-State Electronics, 48(2), 231, 2004 |
| 10 |
Fully depleted SOI process and device technology for digital and RF applications Ichikawa F, Nagatomo Y, Katakura Y, Itoh M, Itoh S, Matsuhashi H, Ichimori T, Hirashita N, Baba S Solid-State Electronics, 48(6), 999, 2004 |