| 915 - 915 |
Advanced Process Control for Semiconductor Manufacturing
Qin SJ, Hsieh M, Epstein DJ, Ho WK |
| 916 - 921 |
Critical dimension and real-time temperature control for warped wafers
Ho WK, Tay A, Fu J, Chen M, Feng Y |
| 922 - 930 |
The Nearest Uniformity Producing Profile (NUPP) optimization criterion for thin-film processing applications
Adomaitis RA |
| 931 - 936 |
An air-flow based wafer bake system for improved temperature uniformity
Lan W, Poh LA, Ming GZ, Loong CS |
| 937 - 945 |
One step forward from run-to-run critical dimension control: Across-wafer level critical dimension control through lithography and etch process
Zhang QL, Poolla K, Spanos CJ |
| 946 - 953 |
Scheduling semiconductor manufacturing processes to enhance system identification
Pasadyn AJ, Lee H, Edgar TF |
| 954 - 960 |
A 3-tier cooperative control architecture for multi-step semiconductor manufacturing process
Mao ZQ, Kang W, Wang F, Raulefs P |
| 961 - 974 |
Virtual metrology and feedback control for semiconductor manufacturing processes using recursive partial least squares
Khan AA, Moyne JR, Tilbury DM |
| 975 - 984 |
Design for manufacturing meets advanced process control: A survey
Pan DZ, Yu P, Cho M, Ramalingam A, Kim K, Rajaram A, Shi SX |
