2.8 kV JBS diodes in 4H-SiC were fabricated with design variations in parameters controlling the trade-off in forward voltage drop and leakage current. The various components of the forward drop are analyzed, and a new optimization for the drift region resistance was found by choosing a "33%" punch through design. Moreover, for striped p+ grid designs, a grid spacing of 7-9 mum is optimal, with regard to minimum forward voltage and low leakage. This optimization takes also second order effects of high temperatures and current densities > 100 A/cm(2) into account.