One of the key issues limiting the commercialization of power SiC rectifiers and switches is the poor yield due to the absence of an effective and reliable edge termination. Efficient edge termination allows for a thinner and heavier doped voltage blocking layer, which directly reduces conduction losses. The focus of this work was to optimize the efficiency and reproducibility of the edge termination technique. For that purpose, 4H-SiC PiN diodes were fabricated with Junction Termination Extension (JTE) created by B+ and Al+ implantation. The JTE-terminated 4H-SiC PiN diodes fabricated in this work exhibited stable reverse bias operation with avalanche breakdown occurring at 1.8 kV. This voltage corresponds to the maximum one-dimensional electric field of 2.67 MV/cm in the blocking layer under the pn junction. Forward voltage drops of 5 V and 8 V were associated with current densities of 1.2 kA/cm(2) and 6.5 kA/cm(2) respectively. Measurement results obtained on the fabricated devices closely matched the simulation results, which confirms the reproducibility and scalability of the design to much higher blocking voltage and forward current levels.