This work describes a new fabrication process for SiC Static Induction Transistors. Only 5 lithography steps are used, due to the self-aligned process for mesa formation, ohmic contacts and gates. The processing parts thoroughly examined are the Inductively Coupled Plasma etching and the tilted Reactive Ion Beam Etching. The ICP etch mask for the mesa is also used as source contacts. The mesa fingers then works as a shadow mask in a tilted etching gate process with RIBE, protecting the trenches and walls. Since the process is scalable, the use of electron beam lithography can make the dimensions and performance better. With optical lithography, mesa widths of 2, 3, 4 and 5 pin are processed. Preliminary result indicate field effect transistor operation with a maximum current density of 110 mA/mm.