The concept of a laterally controlled Vertical Junction Field Effect Transistor (VJFET) in 4H-SiC with blocking voltages up to 1500V and a current rating of some Amps is assumed to be a candidate for an attractive first SiC power switch at the market. In order to compete technically and economically with the existing silicon solutions some optimizations are mandatory. Besides a further reduction of the on-resistance other characteristics like the temperature dependence of the on-resistance and the saturation behavior of the drain current are subject of redesign and technology refinements. The reduction of the on-resistance was indirectly achieved by reducing the field crowding at the buried gate. Both, the saturation behavior and the temperature dependence were successfully optimized by a careful design of the controlling head region (lateral part of the JFET). The strategy is to use a remarkably higher doping in the head region in order to take advantage of better homogeneity and incomplete ionization of dopants in SiC, e.g.. Higher doping increases the saturation current and decrease the temperature dependence of the on-resistance. We demonstrate the effect of the optimization by means of simulations first measurements of devices fabricated by implementing the discussed features into the design and the process flow.