In this work, we experimentally investigate the dynamics of the partial-RESET operation in phase-change memories (PCMs) by considering both single pulse programming and cumulative staircase-up programming carried out on a 180-nm PCM experimental chip based on the is mu-trench cell architecture. A physics-based analytical model of the partial-RESET operation which describes the electro-thermal behavior of the memory cell and gives insights into the dynamical phenomena involved in the amorphization process inside the chalcogenide layer is proposed and validated. Our model shows good accuracy both in the case of single pulse programming and in the case of staircase-up programming, allowing to easily estimate the PCM cell resistance obtained under different programming conditions. (C) 2011 Elsevier Ltd. All rights reserved.