화학공학소재연구정보센터
Solid-State Electronics, Vol.69, 104-106, 2012
Effect of silicon channel orientation on analog performance of (110) surface pMOSFETs
This paper investigates the effect of switching from < 110 > to < 100 > channel orientation on analog performance of (110) surface pMOSFETs with a width-to-length ratio of W/L = 10 mu m/1 mu m. From a comparison between (100) and (110) surface pMOSFETs, the important analog performance metrics involving trans-conductance to drain current ratio (g(m)/I-DS) and DC gain are assessed and discussed. Although there is obvious hole mobility degradation after the switching, no marked difference in gm/I-DS and DC gain is found due to a smaller difference in the gate-bias sensitivity of hole mobility between < 110 > and < 100 > channel orientation. Furthermore, the analog performance of (110) surface pMOSFETs appears to be superior to that of (100) surface counterparts. These results may derive a new guideline for analog applications using long channel pMOSFETs on (110) surface substrates. (c) 2011 Elsevier Ltd. All rights reserved.