화학공학소재연구정보센터
Solid-State Electronics, Vol.76, 44-47, 2012
Performance improvement of low-temperature a-SiGe:H thin-film transistors
This paper presents the study of an interface preparation procedure in the source/drain regions of the active layer, prior to deposit the n+ a-Ge:H contact layer in the fabrication process of low-temperature a-SiGe:H thin-film transistors. The devices were fabricated on corning 1737 substrates at 200 degrees C. The improvement in metal-semiconductor interface by the interface preparation procedure was demonstrated. This interface improvement translates in higher mobility and better values of off-current, on/off-current ratio, subthreshold slope and threshold voltage. (C) 2012 Elsevier Ltd. All rights reserved.