Korean Journal of Materials Research, Vol.23, No.1, 35-40, January, 2013
50 μm 기판을 이용한 a-Si:H/c-Si 이종접합 태양전지 제조 및 특성 분석
a-Si:H/c-Si Heterojunction Solar Cell Performances Using 50 μm Thin Wafer Substrate
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In this study, the influence on the surface passivation properties of crystalline silicon according to silicon wafer thickness, and the correlation with a-Si:H/c-Si heterojunction solar cell performances were investigated. The wafers passivated by p(n)-doped a-Si:H layers show poor passivation properties because of the doping elements, such as boron(B) and phosphorous(P), which result in a low minority carrier lifetime (MCLT). A decrease in open circuit voltage (Voc) was observed when the wafer thickness was thinned from 170 μm to 50 μm. On the other hand, wafers incorporating intrinsic (i) a-Si:H as a passivation layer showed high quality passivation of a-Si:H/c-Si. The implied Voc of the ITO/p a-Si:H/i a-Si:H/n c-Si wafer/ i a-Si:H/n a-Si:H/ITO stacked layers was 0.715 V for 50 μm c-Si substrate, and 0.704 V for 170 μm c-Si. The Voc in the
heterojunction solar cells increased with decreases in the substrate thickness. The high quality passivation property on the c- Si led to an increasing of Voc in the thinner wafer. Short circuit current decreased as the substrate became thinner because of the low optical absorption for long wavelength light. In this paper, we show that high quality passivation of c-Si plays a role
in heterojunction solar cells and is important in the development of thinner wafer technology.
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