In this paper, digital redesign (DR) techniques are presented for a decentralised controller of large-scale sampled-data systems. To improve the performance of the previous DR technique, the state-matching error is defined and directly minimised by using the state-matching error cost function. Also, the discretisation error of the interconnection term is eliminated through an exact discrete-time design approach. Sufficient conditions of the proposed DR techniques are obtained in the Lyapunov sense and are converted into optimal problems with linear matrix inequalities. Finally, two numerical examples are provided to demonstrate the performance improvement of the proposed techniques.