금속 배선 공정에서의 reflow 현상

이승윤; 박종욱; Seung-Yun Lee; Chong-Ook Park

Korean Journal of Materials Research, Vol.9, No.5, 538-543, May, 1999

Export Citation

금속 배선 공정에서의 reflow 현상

Reflow in Metallization Process

이승윤, 박종욱

한국과학기술원 재료공학과

Seung-Yun Lee, and Chong-Ook Park

Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology, Taejon 305-701, Korea

초록

금속 배선 공정에서 응용되고 있는 reflow 에 관한 이론을 살펴보고, 금속 박막 reflow에 영향을 미치는 인자 빛 reflow와 grain growth의 관계를 고찰하였다. 금속 박막 reflow의 구동력은 표면 위치에 따른 chemical potential의 차이이며, 이러한 구동력에 의하여 원자가 이동하게 된다. 반도체 소자의 금속 배선을 제작하는 조건에서 원자의 이동은 주로 surface diffusion에 의하여 이루어진다. 금속 박막의 reflow 에 영향을 미치는 인자로는 reflow 온도, reflow 시간, reflow 분위기, 박막 두께, 박막 재료, underlayer 재료, 패턴 size, aspect ratio가 있으며, 박막을 reflow시키는 동안에 발생하는 grain growth에 의하여 reflow 특성이 변할 것으로 예상되므로 reflow 시 grain growth의 영향을 고려하여야 하리라 생각된다.

The theory of the reflow applied to metallization process was studied, and the factors affecting the reflow and the relation between the reflow and the grain growth were investigated. The driving force for the metal reflow is the difference in chemical potentials along the meta1 surface, and it causes the atom movement. On condition that metal interconnect is fabricated for semiconductor devices, surface diffusion is the primary atom movement mechanism. The metal reflow is influenced by reflow temperature, reflow time, reflow ambient, thin film thickness, thin film material, underlayer material, pattern size, and aspect ratio. It is supposed that the reflow characteristic varies according to the grain growth during the ref1ow, 50 the effect of the grain growth on the reflow should be considered.

[References]

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[1] Hsieh JJ, Joshl RV, Advaned Metallization for ULSI Applications in 1993 MRS, p. 207.

[2] Nishlmura H, Yamada T, Ogawa S, International VLSI Multilevel Interconnection Conference Proceedings 1991, p. 170.

[3] Taguchl M, Koyama K, Sugano Y, International VLSI Multilevel Interconnection Conference Proceedings 1992, p. 219.

[4] Motegi N, Kashimoto Y, Nagatani K, Takahashi S, Kondo T, Mizusawa Y, Nakayama I, J. Vac. Sci. Technol. B, 13(4), 1906 (1995)

[5] Learn AJ, Foster DW, J. Appl. Phys., 58, 2001 (1985)

[6] Bakoglu HB, IEEE Trans. Electron Devices, ED-32, 903 (1985)

[7] Murarka SP, Metallization: Theory and Practice for VLSI and ULSI, p. 96, Butterworth-Heinemann (1993).

[8] Okabayashl H, Mater. Sci. Eng. R-Rep., 11, 191 (1993)

[9] Lee WJ, Min JS, Rha SK, Chun SS, Park CO, Kim DW, J. Mater. Sci. -Mater. El., 7, 111 (1996)

[10] Ohno I, Mater. Sci. Eng. A-Struct. Mater. Prop. Microstruct. Process., 146, 33 (1991)

[11] Park CS, Lee SI, Park JH, Sohn JH, Chin D, Lee JG, International VLSI Multilevel Interconnection Conference Proceedings 1991, p. 326.

[12] Cook LM, J. Non-Cryst. Solids, 120, 152 (1990)

[13] Mullins WW, J. Appl. Phys., 30, 77 (1959)

[14] Brain RA, Ph. D. Thesis, p. 64, California Institute of Technology (1996).

[15] Gaskell DR, Introduction to Metallurgical Thermodynamics, p. 589, Hemisphere Publishlng Corporation (1981).

[16] Mullins WW, J. Appl. Phys., 28, 333 (1957)

[17] Abe K, Harada Y, Onoda H, International VLSI Multilevel Interconnection Conference Proceedings 1995, p. 308.

[18] Kikuta K, Kikkawa T, Aoki M, International VLSI Multilevel Interconnection Conference Proceedings 1991, p. 163.

[19] Kikuta K, Hayashl Y, Nakajima T, Harashima K, Kikkawa T, International Electron Devices Meeting Technical Digest 1994, p. 101.

[20] Inoue M, Hashizume K, Tsuchlkawa H, J. Vac. Sci. Technol. A, 6(3), 1636 (1988)

[21] Miyake T, Petek H, Takeda K, Hinode K, Appl. Phys. Lett., 70(10), 1239 (1997)

[22] Hasunuma M, Ito S, Kaneko H, 1995年春季第 42應用物理學關係連合講演會, 講演짧號 30a-K-6, p.810.

[23] Thopmson CV, Annu. Rev. Mater. Sci., 20, 245 (1990)

[24] Miller KT, Lange FF, Marshall DB, J. Mater. Res., 5(1), 151 (1990)

[25] Hoffman V, Griswold J, Mintz D, Harra D, Thin Solid Films, 153, 369 (1987)

[26] Park IS, Lee SI, Wee YJ, Jung WS, Choi GH, Park CS, Park SH, Ahn ST, Lee MY, Kim YK, Reynolds R, International Electron Devicies Meeting Technical Digest 1994, p. 109.

[27] lto N, Yamada Y, Murao Y, Huo DTC, International VLSI Multilevel Internonnection Conference Proceedings 1994, p.336.

[28] Gardner DS, Fraser DB, International VLSI Multilevel Internonnection Conference Proceedings 1995, p.287.

[29] Ono H, Ushiku Y, Yoda T, International VLSI Multilevel Internonnection Conference Proceedings 1990, p.76.

[30] Zhao B, Biberger MA, Hoffman V, Wang SQ, Vasudev PK, Seidel TE, International Electron Devicies Meeting Technical Digest 1996, p. 353.

[31] Mikagi K, Ishlkawa H, Usami T, Suzuki M, Inoue K, Oda N, Chlkaki S, Sakai I, Kikkawa T, International Electron Devicies Meeting Technical Digest 1996, p. 365.