In this paper we investigate the drain stress behavior and charge trapping phenomena of GaN-based high electron mobility transistors (HEMTs). We fabricated GaN-on-Si MIS-HEMTs with different dielectric stacks in the gate and gate-drain access region and performed interface characterization and stress measurements for slow traps analysis. 2-dimensional TCAD simulations were used to compare the electrical field distributions of the devices in OFF-state stress condition. Our results show a high dependency of the on-resistance increase on interfaces in the gate-drain access region. The dielectric interfaces near the channel play a significant role for long term high voltage stress and regeneration of the device. (C) 2016 Elsevier Ltd. All rights reserved.