The most extensive research of scaled electronic devices involves the inclusion of quantum effects in the transport direction as transistor dimensions approach nanometer scales. Moreover, it is necessary to study how these mechanisms affect different transistor architectures to determine which one can be the best candidate to implement future nodes. This work implements Source-to-Drain Tunneling mechanism (S/D tunneling) in a Multi-Subband Ensemble Monte Carlo (MS-EMC) simulator showing the modification in the distribution of the electrons in the subbands, and, consequently, in the potential profile due to different confinement direction between DGSOIs and FinFETs. (C) 2016 Elsevier Ltd. All rights reserved.