In this paper, we report a new phenomenon in C-V measurement of different gate length MIS-HEMTs, which can be associated with traps character of the AIGaN/GaN interface. The analysis of DC measurement, frequency dependent capacitance-voltage measurements and simulation show that the stress from passivation layer may induce a decrease of drain output current I-ds, an increase of on-resistance, serious nonlinearity of transconductance g(m), and a new peak of C-V curve. The value of the peak is reduced to zero while the gate length and measure frequency are increasing to 21 mu m and 1 MHz, respectively. By using conductance method, the SiNx/GaN interface traps with energy level of E-c-0.42 eV to E-c-0.45 eV and density of 3.2 x 10(12) similar to 5.0 x 10(12) eV(-1) cm(-2) is obtained after passivation. According to the experimental and simulation results, formation of the acceptor-like traps with concentration of 3 x 10(11)cm(-2) and energy level of E-c-037 eV under the gate on AIGaN barrier side of AIGaN/GaN interface is the main reason for the degradation after the passivation. (C) 2017 Published by Elsevier Ltd.