In accordance with the positive bias stress (PBS) instability, generalized equations are derived to extract distributions of trap states in indium zinc oxide (IZO) thin film transistors (TFTs) processed by solution method. In this extraction method, densities of both interface trap states and bulk trap states can be obtained simultaneously. It demonstrates that in the double-active-layer IZO TFT, the front-channel (the bottom layer) annealed by rapid thermal annealing (RTA) in oxygen (O-2) atmosphere with high flow rate has more traps at the interface between insulator and IZO than that annealed in nitrogen (N-2). Meanwhile, the density of bulk trap states in the bilayer stack IZO TFTs is lower than that in the single-active-layer IZO TFTs. In addition, the specific association of electric characteristics with trap states density also has been explored. Results imply that the subthreshold swing of TFT relies more heavily on interface states. Furthermore, contrary to IZO TFT with single active layer, the positive shift of transfer curves per second increased for stacked TFT in the range from 100 to 200 s, at this point one should take into account the interfacial region between two active layers. Nevertheless, on the whole, double-layered active structure can optimize the performance of devices to some extent.