This paper presents a quantitative analysis of the losses of the hybrid cascaded modular multilevel converter (HC-MMC). Regulation of full-bridge (FB) submodule-capacitor voltages in an HC-MMC requires dedicated strategies that affect the voltage harmonics generated by the converter's main power stage and hence its switching patterns and losses. This paper uses an electromagnetic transient simulator (PSCAD/EMTDC) to estimate the semiconductor losses using the switches' turn-on and turn-off characteristics. The paper examines the losses of a 45-MW HC-MMC for two recently introduced voltage-regulation methods based upon the modified sinusoidal pulse width modulation (PWM) and an existing method based upon the trapezoidal PWM. Losses of a conventional FB-MMC that offers dc-fault blocking capability are also investigated and compared with those of HC-MMC. The loss comparison results indicate that: first, the two voltage-regulation methods for HC-MMC based upon the modified sinusoidal PWM result in markedly lower semiconductor losses than the trapezoidal PWM method; second, compared with the original HC-MMC, a mixed submodule HC-MMC may lower the semiconductor losses at certain operating points with proper addition of mixed submodules; and finally, HC-MMC may have up to 9.0% lower semiconductor losses (relative) than the conventional FB-MMC.