III-V compound semiconductors are promising channel materials for the future low-power and high-performance transistor because of their high electron/hole mobility. Here, we report on the integration of vertical InAs nanowire (NW)-channels on Si by selective-area metalorganic vapor phase epitaxy (MOVPE) with a pulse doping technique and demonstration of an InAs NW vertical surrounding-gate transistors. The device had a small subthreshold slope of 68 mV/decade, a normalized transconductance of 0.25 mu S/mu m, and on/off ratio of around 10(7). The axial junction with the pulse doping effectively suppressed off-state leakage current resulting in good electrostatic gate control.