We present a reliable technique to model the influence of DC current-crowding in bipolar transistors on the variation of emitter width (W-E,(ef)) as a function of collector current density (J(C)) in silicon-germanium-carbon heterojunction bipolar transistors (SiGe:C HBTs). This method avoids using geometrical assumptions that may be invalid for highly scaled devices. We point out that according to the scientific literature consulted, this is the first time that the evolution of W-E,(ef) with J(C) extracted from measurements of S-parameters, high frequency noise and small-signal electric modelling is reported for a bipolar transistor technology (homojunction or heterojunction). The investigated SiGe:C HBTs have eight different base layer configurations, varying in base doping level and Ge content. The results show that W-E,W-ef decreases with J(C) for all devices. This behaviour is directly linked to the current-crowding effect. The procedure was used to identify the base configuration layer from the batch of eight SiGe:C HBTs that minimized current-crowding. This method could be applied to state-of-the-art SiGe:C HBTs to determine the base layer technological configuration that mitigates current-crowding and improves the reliability of SiGe:C HBTs. Finally, knowledge of the effective emitter width as a function of bias opens the road to thoroughly analyse the self-heating impact on ultra-fast SiGe:C HBTs.