화학공학소재연구정보센터
Journal of the Electrochemical Society, Vol.141, No.8, 2178-2181, 1994
Offset Trench Isolation
Feasibility of a new, recessed isolation technique that utilizes an offset, shallow trench in combination with thermal oxidation for achieving near zero final encroachment with excellent planarity is demonstrated. Etch of the shallow trench is offset from the original hardmask by an oxide sidewall spacer. After trench etch, HF is used to remove the hardmask oxide and sidewall spacers and to form a cavity which is self-aligned to the nitride edge. Exposed silicon regions are then reoxidized and encapsulated with polysilicon. Field oxide is then grown. The final field oxide profile exhibits steep sidewall angles without inducing substrate defects as evidenced by low diode leakage. Other isolation sensitive device parametrics such as gate oxide quality and metal oxide semiconductor field effect transistor threshold voltage stability are presented and exhibit good characteristics.