The poly buffered LOGOS (PBL) technology makes use of a thin silicon film between a thermal silicon oxide layer and a silicon nitride layer. Pits or holes in the silicon film, formed in subsequent process steps, damage the underlying silicon and defeat the device isolation. In this paper we study the influence of deposition temperature, and post-treatment on pit formation in LPCVD silicon films formed from silane and disilane precursors. We show that homogeneously amorphous silicon films (deposition temperature much less than 550 degrees C) do not develop device level pits during subsequent processing, in PBL technology.