Journal of the Electrochemical Society, Vol.144, No.7, 2548-2551, 1997
Phosphorus Pileup and Sublimation at the Silicon Surface
Low-dose implanted phosphorus that escapes from silicon to pile up at and/or sublimate through the silicon surface during rapid thermal annealing was investigated. Phosphorus-implanted (100) silicon wafers were piranha-cleaned or the BHF-etched, and then annealed at 800 to 1000 degrees C for up to 180 s in nitrogen. Phosphorus sublimation was observed for the BHF-etched wafers at 800 degrees C and the piranha-cleaned wafers at 1000 degrees C. Phosphorus pileup was observed for both types of wafers.