Polycrystalline silicon produced by the solid-phase crystallization of low pressure chemical vapor deposited amorphous films is examined. Electrical activation energy measurements demonstrate that there is a progressive change in the nature of the: dominant conduction paths as solid-phase crystallization proceeds. Film thickness is found to play an important role in determining these dominant conduction paths and thicker films are found to exhibit higher levels of hopping via localized states than thinner films annealed under the same conditions. The defect microstructure of annealed layers of a-Si takes the form of evolving dendrite crystals which coalesce with increasing time of annealing. Thinner films show increasing extent of lateral crystal growth consistent with a more extended state mode of Conduction since few grain boundaries are seen by the dominant conduction path. Thicker films exhibit comparable grain sizes but a reduced lateral extent of crystallization. The balance between grain size and film thickness for increasing times of annealing will define the optimum electronic properties of the material. Dendritic grains are characterized by twin band core structures, and a high density of stacking faults are generally associated with grains from the first stages of nucleation.