For the first time, metal-oxide-semiconductor interface atomic force microscope images were used to directly calculate the Fowler-Nordheim tunneling behavior for thin gate oxides with different interface roughness. Assuming that the roughness is conformal on both interfaces, surface curvature and electric field distribution were used to calculate the tunneling current density caused by low spatial frequency roughness. On the other hand, a three-dimensional Laplace solver and a quasi-one-dimensional Fowler-Nordheim equation were used to calculate the tunneling current contributed by high spatial frequency roughness. Considering contributions due to both high and low spatial frequency roughnesses, we found good agreement between the theoretical calculation and experimentally measured tunneling current-voltage curves. This simulation indicates that oxide thinning is probably not the main reason for the increase of tunneling current in the thin oxide (similar to 6 nm) range. The higher surface electric field due to roughness curvature itself is most likely responsible for this increase.