Giant magnetoresistance (GMR) device integration with Si ICs requires an atomically smooth and clean dielectric surface for the conformal deposition of GMR multi-layers. A chemical-mechanical polishing (CMP) process demonstrates that PVD silicon nitride films can achieve less than 0.2 nm RMS surface roughness with a wide process window. This CMP process for silicon nitride is a more robust and manufacturable process than CMP of PTEOS oxide. Alternative techniques for post-CMP cleaning prior to GMR film deposition indicate that brush scrub clean provides lowest levels of metallic contamination, while a chemical cleaning with ammonium hydroxide-hydrogen peroxide mixture delivers lowest defect counts.