Journal of the Electrochemical Society, Vol.146, No.5, 1925-1928, 1999
Lateral gettering of Fe on bulk and silicon-on-insulator wafers
Laterally displaced gettering sites have been studied as an alternative to traditional internal gettering and back-side gettering sites. Fe was diffused laterally and captured, first by coulombic pairing with B in p-type Si, and then by strategically placed ion implantation induced dislocation loops. This localization of Fe was tracked by both deep level transient spectroscopy and capacitance-voltage measurements. As proof of the viability of the gettering technique, laterally displaced gettering sites were formed adjacent to capacitors on various silicon-on-insulator (SOI) substrate types. Both implantation induced dislocation loops and P diffusion were used for gettering. An improvement in gate oxide integrity was observed for capacitors with lateral gettering on all SOI types studied.