Tungsten chemical vapor deposition (CVD) remains the preferred method to make vertical metal interconnects in oxide vias on silicon integrated circuits. Vias are lined with thin titanium films, protected by a TiN diffusion barrier deposited on top followed by tungsten CVD. "Volcano" reactions, which result in rupture of the TiN barrier and electrical failure of the interconnect, remains an integration difficulty of great interest. Four parameters are found to strongly influence volcano reactions: the mixture of WF6 and SiH4 gases during tungsten nucleation film deposition, TIN barrier thickness, use of plasma preclean before Ti/TiN deposition, and a rapid thermal anneal after Ti/TiN deposition and before tungsten CVD. We describe process methods to avoid volcano reactions with thin TIN barrier films, maintaining low resistivity in the via. The influence of varying these parameters on overall step coverage is also discussed.