Integrated capacitors can easily cover a major part of the total chip area which may seriously affect the cost to produce the chip. By using a high epsilon material as the dielectric material, in the capacitor, the size can be reduced significantly. One very promising candidate is tantalum pentoxide (Ta2O5) which has a dielectric constant of about 25. This should be compared to silicon nitride which has a dielectric constant of 8. In order to make integrated capacitors the tantarum pentoxide must be patterned. Results of a study on etching of tantalum pentoxide, silicon dioxide, and polysilicon with a high density plasma, using an inductively coupled plasma source, are presented and compared to results obtained by means of reactive ion etching. The gas used, CHF3, implies a polymerizing chemistry and the deposition of a fluorocarbon layer is shown to play an important role in the etch process. The fluorocarbon deposition onto the substrate surface is not only affected by the temperature of the substrate itself but also by the temperature of all surfaces that are exposed to the plasma. The process parameters with the strongest influence on the process have been found to be pressure and substrate bias voltage.