A metal-ferroelectric-insulator-silicon (MFIS) structure using leaw-zirconate-titanate (PZT) as the ferroelectric layer and Ta2O5 as the insulator layer is fabricated. This structure is studied for the potential application of nonvolatile memory devices. The Ta2O5 layer is used as a buffer layer to minimize the out diffusion of silicon atoms during heat treatment processes. High frequency capacitance-voltage measurements show a flat band voltage shift of 13 V under a +/-15 V writing pulse. The interface-trap density D-it is measured by the conductance method. The MFIS capacitors are shown to have a fatigue lifetime of 1 X 10(11) cycles and 5 X 10(7) cycles for 11.4 and 15 V writing pulses, respectively.