We have proposed low energy electron-beam proximity projection lithography [T. Utsumi, Jpn. J. Appl. Phys., Part 1 38, 7046 (1999); J. Vac. Sci. Technol. B 17, 2897 (1999)] (LEEPL) for LSI production lithographic processes below 100-nm-feature size. One and one half years ago, the proof of concept (POC) of LEEPL was successfully completed using an alpha tool. Now, a beta tool of LEEPL, which is similar to a mass production tool in the 100- and.70-nm-technology node, has been developed. We have already completed the performance evaluations of the 8 tool and confirmed proof of lithography. We obtained patterning resolution of 45-nm-L/S patterns and 48-nm(phi)-hole patterns in resist images and overlay accuracy of 23 nm (3sigma) in the x direction and 31 nm (3sigma) in the y direction over an effective area of 8 in. wafer. Furthermore, functionality of complementary mask alignment was demonstrated and logic type device-like patterns in 100-nm-technology node were fabricated. (C) 2003 American Vacuum Society.