A shallow and deep trench isolation process module for high performance rf bipolar complementary metal-oxide-semiconductor (BiCMOS) is presented in detail. The shallow trench is etched prior to the deep trench, allowing the deep trench to be placed self-aligned to the shallow trench edge. By planarizing the polycrystalline silicon deep trench filling using chemical mechanical polishing (CMP) before etchback, the recess into deep trenches is decreased and polysilicon spacer formation at the active area edges is avoided. The poly CMP is stopped before all polysilicon in the active area is removed, to avoid polysilicon dishing and erosion of oxide on top of nitride on active area. Important issues arising during process development are discussed. Two different slurries were evaluated, which resulted in two different nonuniformities of polysilicon thickness. Nonuniformity transfers partially down to a range of recesses into the deep trenches, but the recesses were much smaller compared to the etchback only. High-density chemical vapor deposition was used for shallow trench filling and a direct shallow trench isolation-CMP process was developed. The feasibility of the process module was demonstrated using a 0.25 mum, 200 mm bipolar double-poly rf process with optional SiGe epi base. Electrical results from completed transistors are presented to verify the function of the module. (C) 2004 The Electrochemical Society.