The electrical and structural properties of defects in epitaxial Si/SiGe with Ge content from 5 to 41% are investigated using electron-beam-induced current contrast measurements and bevel polishing with preferential defect etching. At room temperature, no electrical activity of misfit and threading dislocations is evident for wafers with 14, 21, and 41% Ge, while at 105 K a crossgrid array of misfit dislocations is observed on all these wafers and shallow level traps from threading dislocation defects are seen on the 41% Ge wafer. Thermal treatments reduce the electrical activity of the defects. Bevel polishing and preferential chemical etching with the Wright and Secco etches are utilized to analyze the dislocation density and distribution throughout the hetero-structure. The etch chemistry difference between Si and SiGe is characterized as a function of Ge content to correctly interpret results. The etch rate increases with increasing Ge concentration up to 15% Ge, then saturates at a rate of similar to 3 mu m/min for higher Ge values, which is about 3 times that for an unstrained Si substrate. The etch rate is strongly dependent on the defect concentration, stress, and defect density in the layers. (c) 2005 The Electrochemical Society.