We have investigated the electrical characteristics of metal-insulator-semiconductor (MIS) capacitors consisting of p-type semiconductor layer, either regio-regular poly(3-hexylthiophene) (P3HT) or copper-phthalocyanine (CuPc) prepared on tantalum oxide, with a high dielectric constant (similar to 20), or double layered structure consisting of tantalum oxide and polyimide thin films. These results are combined with field effect transistor (FET) properties and conventional surface potential measurements and discussed in terms of the interfacial capacitance and charge exchange phenomena at the semiconductor/insulator interface. It was found that the use of Ta2O5 as a gate insulator is not only an effective way to reduce operating voltage of FET but also a useful way to investigate the interfacial capacitance which exists within a few nanometers at the semiconductor/gate insulator interface. The interfacial trap density, which is deeply associated with FET properties, was also discussed, taking into account the conventional capacitance measurement and the threshold voltage in FET properties. (c) 2005 Elsevier B.V. All rights reserved.